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Jet Process |
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Specialists in Gold Tin Solder and Other Coatings & Other Advanced Thin Films |
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Microelectronics . Semiconductor Packaging . Optoelectronics & Photonics . Solid State Lighting . |
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JVD™ Solder Layers: Gold-tin solder alloys, ranging from the eutectic 80/20 Au/Sn composition to 70/30, are of proven utility for integrated circuit chip or die bonding, because of their high bond strength, adhesion, resistance to creep, low stress, corrosion resistance, good thermal conductivity and absence of whisker formation. Solder preforms are costly, and become difficult to use as required sizes shrink. Solder pastes can have both process capability issues and shortcomings in high performance device reliability and durability. JVD™ thin film AuSn solder layers offer a new, fast, low cost solution. We are using the JVD process to deposit eutectic AuSn solder layers with thicknesses typically ranging from 1 to 10 microns, and sometimes up to or over 20 microns. Alloy composition is precisely maintained from source to substrate, and the alloy deposits with uniform composition, not as alternating Au and Sn layers. Metal capture efficiency can exceed 90% with little waste of expensive metal. We do batch or single wafer processes, coating ceramic squares or rectangles, as well as Si and III-V wafers, in sizes ranging from 2" to 8". Patterned substrates bearing photoresist are compatible with our process. The deposition rates are high: coating of a 4" Si wafer with 4 microns of AuSn takes less than 20 minutes. We can also couple our JVD process for AuSn with our Ti-Pt-Au deposition process. We thus offer deposition of the entire structure of bond/barrier layers plus gold-tin solder layers using JVD technology. Jet Process provides custom JVD metallizing services for these and many other coatings in R&D, prototype and high volume production applications. Lead free soldering has become a number one goal in advanced microelectronics, semiconductor packaging and related worldwide markets. The elements of greatest importance for lead free solders are Ag, Al, Au, Bi, Cu, Ga, Ge, In, Mg, Sb, Si, Sn, and Zn. Those in bold face can be deposited at very high rate in JVD, singly or in alloy form, with near perfect control over composition. For example, we have used JVD low temperature deposition to make indium-tin (InSn) solder alloys for reflowed bumps of 20 micron diameter providing IC densities of 16,000 bumps per square inch. Electrical resistance and mechanical properties of these ICs is very close to bulk material properties. Key JVD advantages for this application include preservation of optimum alloy stoichiometry (thereby achieving the lowest melting point), near room temperature processing (thus compatible with heat sensitive piezoelectric elements), high throughput and in-situ stripping of nickel oxide from under bump metal to result in excellent solder wetting. For potential use in high density flip chip and solder bumping, we have also recently demonstrated high rate JVD deposition of several standard solder metal alloys (AuSn, In, etc.) through patterned photoresist with feature sizes well below 10 microns, e.g.: 4 X 4 microns with 8 micron pitch. JVD metal cluster deposition has also recently been used for filling equally high density, small dimension holes and vias. Related information on JVD advantages and capabilities for lead free solder deposition can be found in the Technical Info and Services and Systems sections. For additional information click here for the February 2003 article on JVD gold tin solder in Advanced Packaging magazine. For information on availabilities and pricing, please contact us. |
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Jet Process Corporation |
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